FT-8800R tech documentation

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(Filled in some missing info)
(dial butons and wires button)
 
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'''TODO:''' Information for encoder dial button signal and WIRES (DXKEY) is missing.
 
{| class="wikitable"
{| class="wikitable"
|+ Panel Unit packet structure
|+ Panel Unit packet structure
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|-
|-
| '''11'''
| '''11'''
-
| || || colspan="1" | SET key || || || || || SBZ
+
| RENCB || LENCB || colspan="1" | SET key || WIRES || || || || SBZ
|-
|-
| '''12'''
| '''12'''
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Testing confirms there is no CRC or other dependent bits in the packet. Each bit has been demonstrated to be independent. Although the main unit will only activate segments in certain ways, the panel is essentially a dumb terminal and will accept any type of bitmap combination.
Testing confirms there is no CRC or other dependent bits in the packet. Each bit has been demonstrated to be independent. Although the main unit will only activate segments in certain ways, the panel is essentially a dumb terminal and will accept any type of bitmap combination.
 +
 +
The following table maps the "Yaesu" natural order assignments to one of the "conventional" 14-segment pin assignments. It should be noted that the Yaesu assignments were not per any Yaesu documentation and simply chosen in alphabetic order based on the ordering of bits in the control packet. The "conventional" ordering is based on LED segment datasheets. There is another assignment nomenclature that uses G1, and G2 for the horizontal segments. Unlike with the 7-segment case there doesn't seem to be any prevailing standard that is near universal. The third column maps bits. The bit assingment is based on numbering the Yaesu case in order, but skipping the unused 8th bits in each byte, but including the unused bits that are used for other segments, since those form a regular pattern in every case. The last column (Rep 2) is a simple ordering from 0 to n.
 +
 +
{| class="wikitable"
 +
|+ Segment Mapping Table
 +
! Current !! New !! Packet bit !! Rep 1 !! Rep 2
 +
|-
 +
| A || C || 0 || 2 || 0
 +
|-
 +
| B || J || 1 || 8 || 1
 +
|-
 +
| C || B || 2 || 1 || 2
 +
|-
 +
| D || H || 3 || 7 || 3
 +
|-
 +
| E || A || 4 || 0 || 4
 +
|-
 +
| F || N || 5 || 12 || 5
 +
|-
 +
| G || P || 6 || 13 || 6
 +
|-
 +
| H || K || 8 || 9 || 7
 +
|-
 +
| I || D || 9 || 3 || 8
 +
|-
 +
| J || G, L || 10 || 6, 10 || 9
 +
|-
 +
| K || M || 12 || 11 || 10
 +
|-
 +
| L || E || 13 || 4 || 11
 +
|-
 +
| M || F || 14 || 5 || 12
 +
|}
[[File:14seg_yaesu.png|right|frame|The 14-segment display segment assignments as seen in the update packet structure]].
[[File:14seg_yaesu.png|right|frame|The 14-segment display segment assignments as seen in the update packet structure]].
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| MINUS || Minus repeater shift flag
| MINUS || Minus repeater shift flag
|}
|}
-
 
-
=== Missing Information ===
 
-
* The 7-segment displays need to be verified on both sides
 
-
* Display brightness - There is a dimmer setting, and the value must be conveyed in the packet somewhere.
 
{| class="wikitable"
{| class="wikitable"
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| C<sub>L</sub>.0.B || C<sub>L</sub>.0.G || C<sub>L</sub>.0.A || SBZ
| C<sub>L</sub>.0.B || C<sub>L</sub>.0.G || C<sub>L</sub>.0.A || SBZ
|-
|-
-
| '''38''' || C<sub>L</sub>.0.E || C<sub>L</sub>.0.F || C<sub>L</sub>.0.D || A?
+
| '''38''' || C<sub>L</sub>.0.E || C<sub>L</sub>.0.F || C<sub>L</sub>.0.D || C<sub>L</sub>.2.D
| C<sub>L</sub>.1.C || C<sub>L</sub>.1.B || C<sub>L</sub>.1.G || SBZ
| C<sub>L</sub>.1.C || C<sub>L</sub>.1.B || C<sub>L</sub>.1.G || SBZ
| C<sub>L</sub>.1.A || C<sub>L</sub>.1.E || C<sub>L</sub>.1.F
| C<sub>L</sub>.1.A || C<sub>L</sub>.1.E || C<sub>L</sub>.1.F
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| '''40''' || U? || U? || C<sub>L</sub>.2.C || C<sub>L</sub>.2.B || C<sub>L</sub>.2.G
| '''40''' || U? || U? || C<sub>L</sub>.2.C || C<sub>L</sub>.2.B || C<sub>L</sub>.2.G
| C<sub>L</sub>.2.A || C<sub>L</sub>.2.E || SBZ
| C<sub>L</sub>.2.A || C<sub>L</sub>.2.E || SBZ
-
| C<sub>L</sub>.2.F || C<sub>L</sub>.2.D || U? || U? || U? || U? || U? || SBZ
+
| C<sub>L</sub>.2.F || DISPB0 || DISPB1 || DISPB2 || U? || U? || U? || SBZ
|}
|}
= Documentation =
= Documentation =
* [http://luebsphoto.com/files/FT-8800R_USA_EXP_OM_ENG_EH018M100.pdf Operations Manual]
* [http://luebsphoto.com/files/FT-8800R_USA_EXP_OM_ENG_EH018M100.pdf Operations Manual]

Latest revision as of 08:14, 28 November 2011

Contents

Links

Technical

Pinouts

6P6C Main Unit to Panel Unit Pinout
Pin Name Description
1 MOD Buffered Modulation (AF) Input (~2.2kΩ source impedance)
2 POWERSW Active-low (pulled through 1KΩ resistor) momentary power switch signal
3 9V 9VDC regulated supply voltage for Panel Unit
4 GND Ground
5 RXD Head unit Asynchronous serial (19.2 kbps 8N1) Receive
6 TXD Head unit Asynchronous serial (19.2 kbps 8N1) Transmit
6P6C Panel Unit microphone connector
Pin Name Description
1 SW2 Matrix keypad column input
2 SW1 Matrix keypad row input
3 9V 9VDC regulated supply voltage
4 GND Ground
5 MIC Electret microphone audio input
6 PTT Active-low push-to-talk switch

Protocol

Head unit packet

The head unit continuously sends a 13-octet packet to the main unit, with a brief delay between each packet. Testing confirms that if this packet is not sent for some time (on the order of 1s), the main unit shutsdown. This "watchdog" basically activates if something were to break communication between the head unit and the main unit. Although the raw line coding of the packet is with 8-bit data words, display information is only encoded in the lower 7-bits of each word. The MSb is used as the synchronization bit and is 1 in the first octet only.

The head unit sends a fairly raw representation of the input switches and dials. It does not seem to do any high level processing. The packet contains no CRC or any bits dependent on other bits outside of a single function group.

Except for the hyper-memory keys, the keypads are implemented with matrix multiplexing and/or resistor dividers. The head unit uses an ADC and seems to pass these counts unmodified to the main unit which must deal with range checking. The specified count values below were recorded with an actual unit, but it should be obvious what the "nominal" values are, and since the resistor dividers are on the schematic, it is easy to cross-check.

Measured parameters
Parameter (Unit) Description Value
Communication Asynchronous communication 19.2 kbps 8-N-1 (8 data bits, no parity, 1 stop bit)
Head unit update period (ms) Time between start of panel unit

TX packet to start of next packet

TBD (on order of 20)
Main unit update period (ms) Time between start of main unit

TX packet to start of next packet

TBD (on order of 40)
Watchdog Time (s) Minimum time between last update packet

from panel unit and when main unit shutdowns (powers off)

TBD
Panel Unit packet structure
Octet 0 1 2 3 4 5 6 7
0 Left encoder count since update

(2's complement - CW is positive)

SBO
1 Right encoder count since update

(2's complement - CW is positive)

SBZ
2 PTT input ADC
  • 7Fh ~ PTT disabled
  • 1Bh ~ PTT enabled
SBZ
3 Right squelch ring ADC (7Fh: open squelch) SBZ
4 Right volume control ADC (7Fh: max volume) SBZ
5 SW1 keypad matrix row ADC
  • 00h: 1-A
  • 1Ah: 4-B, UP
  • 32h: 7-C, DOWN
  • 4Ch: *-D
  • 64h: P1-P4
  • 7Fh: inactive
SBZ
6 Left squelch ring ADC (7Fh: open squelch) SBZ
7 Left volume control ADC (7Fh: max volume) SBZ
8 SW2 keypad matrix column ADC
  • 06h: UP/DWN
  • 1Bh: 1-*,P1
  • 33h: 2-0,P2
  • 4Ch: 3-#,P3
  • 67h: A-D,P4
  • 7Fh: inactive
SBZ
9 Panel right-side (multiplexed) buttons
  • 00h: SCN
  • 20h: HM
  • 40h: V/M
  • 60h: LOW
  • 7Fh: none
SBZ
10 Panel left-side (multiplexed) buttons
  • 00h: LOW
  • 20h: V/M
  • 40h: HM
  • 60h: SCN
  • 7Fh: none
SBZ
11 RENCB LENCB SET key WIRES SBZ
12 Hyper-memory key
  • 00: No key
  • 01-06: hyper selection

Main unit Packet

The main unit continuously sends a 42-byte packet to the panel unit. This packet essentially contains a raw bitmap indicating what LCD display segments should be illuminated. There seems to be no other higher level coding included in this packet. Although the raw line coding of the packet is with 8-bit data words, display information is only encoded in the lower 7-bits of each word. The MSb is used as the synchronization bit.

Testing confirms there is no CRC or other dependent bits in the packet. Each bit has been demonstrated to be independent. Although the main unit will only activate segments in certain ways, the panel is essentially a dumb terminal and will accept any type of bitmap combination.

The following table maps the "Yaesu" natural order assignments to one of the "conventional" 14-segment pin assignments. It should be noted that the Yaesu assignments were not per any Yaesu documentation and simply chosen in alphabetic order based on the ordering of bits in the control packet. The "conventional" ordering is based on LED segment datasheets. There is another assignment nomenclature that uses G1, and G2 for the horizontal segments. Unlike with the 7-segment case there doesn't seem to be any prevailing standard that is near universal. The third column maps bits. The bit assingment is based on numbering the Yaesu case in order, but skipping the unused 8th bits in each byte, but including the unused bits that are used for other segments, since those form a regular pattern in every case. The last column (Rep 2) is a simple ordering from 0 to n.

Segment Mapping Table
Current New Packet bit Rep 1 Rep 2
A C 0 2 0
B J 1 8 1
C B 2 1 2
D H 3 7 3
E A 4 0 4
F N 5 12 5
G P 6 13 6
H K 8 9 7
I D 9 3 8
J G, L 10 6, 10 9
K M 12 11 10
L E 13 4 11
M F 14 5 12
The 14-segment display segment assignments as seen in the update packet structure
.
Packet definitions
Signal Description
Most segments are duplicated on left-and-right (indicated by subscript)
Digits are numbered least-significant to most significant (right to left)

starting at 0.

The 14-segment displays used only have 13 addressable segments. There is only one

addressable vertical segment.

F Frequency/Alpha 14-Segment displays
C Channel 7-segment displays
SM S-Meter segments (right-to-left)
BUSY Busy channel indicator
MAIN "Main" Band indicator
PMS Preferential Memory Scan Flag (Left-pointing arrow)
SKIP Skip Memory channel flag
ENC Tone encoder flag
DEC Tone decoder flag
DCS Digital Code Squelch flag
9600 9600bps Packet mode flag
PL Low TX Power flag
PM Medium TX Power flag
TX Transmitter active flag
SET Set mode active flag
LOCK Keypad lock flag
APO Auto power-off enable flag
PLUS Plus repeater shift flag
MINUS Minus repeater shift flag
Main Unit packet structure
Octet 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
0 U? APO PML FL.0.DP SML.8 FL.0.A FLL.0.B SBO FL.0.C FL.0.D FL.0.E FL.0.F FL.0.G PLL FL.0.H SBZ
2 FL.0.I FL.0.J SML.7 FL.0.K FL.0.L FL.0.M SML.6 SBZ FL.1.A FL.1.B FL.1.C FL.1.D FL.1.E FL.1.F FL.1.G SBZ
4 9600L FL.1.H FL.1.I FL.1.J SML.5 FL.1.K FL.1.L SBZ FL.1.M SML.4 FL.2.A FL.2.B FL.2.C FL.2.D FL.2.E SBZ
6 FL.2.F FL.2.G AM FL.2.H FL.2.I FL.2.J SML.3 SBZ FL.2.K FL.2.L FL.2.M U? U? U? U? SBZ
8 FL.3.DP A? SML.2 FL.3.A FL.3.B FL.3.C FL.3.D SBZ FL.3.E FL.3.F FL.3.G DCSL FL.3.H FL.3.I FL.3.J SBZ
10 SML.1 FL.3.K FL.3.L FL.3.M SML.0 FL.4.A FL.4.B SBZ FL.4.C FL.4.D FL.4.E FL.4.F FL.4.G MUTEL FL.4.H SBZ
12 FL.4.I FL.4.J BUSYL FL.4.K FL.4.L FL.4.M MTL SBZ FL.5.A FL.5.B FL.5.C FL.5.D FL.5.E FL.5.F FL.5.G SBZ
14 U? FL.5.H FL.5.I FL.5.J U? FL.5.K FL.5.L SBZ FL.5.M U? U? U? U? U? U? SBZ
16 U? U? PMR FR.0.DP SMR.8 FR.0.A FLR.0.B SBZ FR.0.C FR.0.D FR.0.E FR.0.F FR.0.G PLR FR.0.H SBZ
18 FR.0.I FR.0.J SMR.7 FR.0.K FR.0.L FR.0.M SMR.6 SBZ FR.1.A FR.1.B FR.1.C FR.1.D FR.1.E FR.1.F FR.1.G SBZ
20 9600R FR.1.H FR.1.I FR.1.J SMR.5 FR.1.K FR.1.L SBZ FR.1.M SMR.4 FR.2.A FR.2.B FR.2.C FR.2.D FR.2.E SBZ
22 FR.2.F FR.2.G DCSR FR.2.H FR.2.I FR.2.J SMR.3 SBZ FR.2.K FR.2.L FR.2.M U? U? U? U? SBZ
24 FR.3.DP A? SMR.2 FR.3.A FR.3.B FR.3.C FR.3.D SBZ FR.3.E FR.3.F FR.3.G MUTER FR.3.H FR.3.I FR.3.J SBZ
26 SMR.1 FR.3.K FR.3.L FR.3.M SMR.0 FR.4.A FR.4.B SBZ FR.4.C FR.4.D FR.4.E FR.4.F FR.4.G MTR FR.4.H SBZ
28 FR.4.I FR.4.J BUSYR FR.4.K FR.4.L FR.4.M KEY2 SBZ FR.5.A FR.5.B FR.5.C FR.5.D FR.5.E FR.5.F FR.5.G SBZ
30 SET FR.5.H FR.5.I FR.5.J LOCK FR.5.K FR.5.L SBZ FR.5.M U? U? U? U? U? U? SBZ
32 MAINR TXR PLUSR MINUSR ENCR DEC R PMSR SBZ SKIPR CR.0.C CR.0.B CR.0.G CR.0.A CR.0.E CR.0.F SBZ
34 CR.0.D CR.2.D CR.1.C CR.1.B CR.1.G CR.1.A CR.1.E SBZ CR.1.F CR.1.D CR.DSH CR.2.C CR.2.B CR.2.G CR.2.A SBZ
36 CR.2.E CR.2.F MAINL TXL PLUSL MINUSL ENCL SBZ DECL PMSL SKIPL CL.0.C CL.0.B CL.0.G CL.0.A SBZ
38 CL.0.E CL.0.F CL.0.D CL.2.D CL.1.C CL.1.B CL.1.G SBZ CL.1.A CL.1.E CL.1.F A? U? U? U? SBZ
40 U? U? CL.2.C CL.2.B CL.2.G CL.2.A CL.2.E SBZ CL.2.F DISPB0 DISPB1 DISPB2 U? U? U? SBZ

Documentation

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