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Technical

Pinouts

6P6C Main Unit to Panel Unit Pinout
Pin	Name	Description
1	MOD	Buffered Modulation (AF) Input (~2.2kΩ source impedance)
2	POWERSW	Active-low (pulled through 1KΩ resistor) momentary power switch signal
3	9V	9VDC regulated supply voltage for Panel Unit
4	GND	Ground
5	RXD	Head unit Asynchronous serial (19.2 kbps 8N1) Receive
6	TXD	Head unit Asynchronous serial (19.2 kbps 8N1) Transmit

6P6C Panel Unit microphone connector
Pin	Name	Description
1	SW2	Matrix keypad column input
2	SW1	Matrix keypad row input
3	9V	9VDC regulated supply voltage
4	GND	Ground
5	MIC	Electret microphone audio input
6	PTT	Active-low push-to-talk switch

Protocol

Head unit packet

The head unit continuously sends a 13-octet packet to the main unit, with a brief delay between each packet. Testing confirms that if this packet is not sent for some time (on the order of 1s), the main unit shutsdown. This "watchdog" basically activates if something were to break communication between the head unit and the main unit. Although the raw line coding of the packet is with 8-bit data words, display information is only encoded in the lower 7-bits of each word. The MSb is used as the synchronization bit and is 1 in the first octet only.

The head unit sends a fairly raw representation of the input switches and dials. It does not seem to do any high level processing. The packet contains no CRC or any bits dependent on other bits outside of a single function group.

Except for the hyper-memory keys, the keypads are implemented with matrix multiplexing and/or resistor dividers. The head unit uses an ADC and seems to pass these counts unmodified to the main unit which must deal with range checking. The specified count values below were recorded with an actual unit, but it should be obvious what the "nominal" values are, and since the resistor dividers are on the schematic, it is easy to cross-check.

Measured parameters
Parameter (Unit)	Description	Value
Communication	Asynchronous communication	19.2 kbps 8-N-1 (8 data bits, no parity, 1 stop bit)
Head unit update period (ms)	Time between start of panel unit TX packet to start of next packet	TBD (on order of 20)
Main unit update period (ms)	Time between start of main unit TX packet to start of next packet	TBD (on order of 40)
Watchdog Time (s)	Minimum time between last update packet from panel unit and when main unit shutdowns (powers off)	TBD

TODO: Information for encoder dial button signal and WIRES (DXKEY) is missing.

Panel Unit packet structure
Octet	0	2	7
0	Left encoder count since update (2's complement - CW is positive)		SBO
1	Right encoder count since update (2's complement - CW is positive)		SBZ
2	PTT input ADC 7Fh ~ PTT disabled 1Bh ~ PTT enabled		SBZ
3	Right squelch ring ADC (7Fh: open squelch)		SBZ
4	Right volume control ADC (7Fh: max volume)		SBZ
5	SW1 keypad matrix row ADC 00h: 1-A 1Ah: 4-B, UP 32h: 7-C, DOWN 4Ch: *-D 64h: P1-P4 7Fh: inactive		SBZ
6	Left squelch ring ADC (7Fh: open squelch)		SBZ
7	Left volume control ADC (7Fh: max volume)		SBZ
8	SW2 keypad matrix column ADC 06h: UP/DWN 1Bh: 1-*,P1 33h: 2-0,P2 4Ch: 3-#,P3 67h: A-D,P4 7Fh: inactive		SBZ
9	Panel right-side (multiplexed) buttons 00h: SCN 20h: HM 40h: V/M 60h: LOW 7Fh: none		SBZ
10	Panel left-side (multiplexed) buttons 00h: LOW 20h: V/M 40h: HM 60h: SCN 7Fh: none		SBZ
11		SET key	SBZ
12	Hyper-memory key 00: No key 01-06: hyper selection

Main unit Packet

The main unit continuously sends a 42-byte packet to the panel unit. This packet essentially contains a raw bitmap indicating what LCD display segments should be illuminated. There seems to be no other higher level coding included in this packet. Although the raw line coding of the packet is with 8-bit data words, display information is only encoded in the lower 7-bits of each word. The MSb is used as the synchronization bit.

Testing confirms there is no CRC or other dependent bits in the packet. Each bit has been demonstrated to be independent. Although the main unit will only activate segments in certain ways, the panel is essentially a dumb terminal and will accept any type of bitmap combination.

The 14-segment display segment assignments as seen in the update packet structure

.

Packet definitions
Signal	Description
Most segments are duplicated on left-and-right (indicated by subscript)
Digits are numbered least-significant to most significant (right to left) starting at 0.
The 14-segment displays used only have 13 addressable segments. There is only one addressable vertical segment.
F	Frequency/Alpha 14-Segment displays
C	Channel 7-segment displays
SM	S-Meter segments (right-to-left)
BUSY	Busy channel indicator
MAIN	"Main" Band indicator
PMS	Preferential Memory Scan Flag (Left-pointing arrow)
SKIP	Skip Memory channel flag
ENC	Tone encoder flag
DEC	Tone decoder flag
DCS	Digital Code Squelch flag
9600	9600bps Packet mode flag
PL	Low TX Power flag
PM	Medium TX Power flag
TX	Transmitter active flag
SET	Set mode active flag
LOCK	Keypad lock flag
APO	Auto power-off enable flag
PLUS	Plus repeater shift flag
MINUS	Minus repeater shift flag

Missing Information

The 7-segment displays need to be verified on both sides
Display brightness - There is a dimmer setting, and the value must be conveyed in the packet somewhere.

Main Unit packet structure
Octet	0	1	2	3	4	5	6	7	8	9	10	11	12	13	14	15
0	U?	APO	PM_L	F_L.0.DP	SM_L.8	F_L.0.A	FL_L.0.B	SBO	F_L.0.C	F_L.0.D	F_L.0.E	F_L.0.F	F_L.0.G	PL_L	F_L.0.H	SBZ
2	F_L.0.I	F_L.0.J	SM_L.7	F_L.0.K	F_L.0.L	F_L.0.M	SM_L.6	SBZ	F_L.1.A	F_L.1.B	F_L.1.C	F_L.1.D	F_L.1.E	F_L.1.F	F_L.1.G	SBZ
4	9600_L	F_L.1.H	F_L.1.I	F_L.1.J	SM_L.5	F_L.1.K	F_L.1.L	SBZ	F_L.1.M	SM_L.4	F_L.2.A	F_L.2.B	F_L.2.C	F_L.2.D	F_L.2.E	SBZ
6	F_L.2.F	F_L.2.G	AM	F_L.2.H	F_L.2.I	F_L.2.J	SM_L.3	SBZ	F_L.2.K	F_L.2.L	F_L.2.M	U?	U?	U?	U?	SBZ
8	F_L.3.DP	A?	SM_L.2	F_L.3.A	F_L.3.B	F_L.3.C	F_L.3.D	SBZ	F_L.3.E	F_L.3.F	F_L.3.G	DCS_L	F_L.3.H	F_L.3.I	F_L.3.J	SBZ
10	SM_L.1	F_L.3.K	F_L.3.L	F_L.3.M	SM_L.0	F_L.4.A	F_L.4.B	SBZ	F_L.4.C	F_L.4.D	F_L.4.E	F_L.4.F	F_L.4.G	MUTE_L	F_L.4.H	SBZ
12	F_L.4.I	F_L.4.J	BUSY_L	F_L.4.K	F_L.4.L	F_L.4.M	MT_L	SBZ	F_L.5.A	F_L.5.B	F_L.5.C	F_L.5.D	F_L.5.E	F_L.5.F	F_L.5.G	SBZ
14	U?	F_L.5.H	F_L.5.I	F_L.5.J	U?	F_L.5.K	F_L.5.L	SBZ	F_L.5.M	U?	U?	U?	U?	U?	U?	SBZ
16	U?	U?	PM_R	F_R.0.DP	SM_R.8	F_R.0.A	FL_R.0.B	SBZ	F_R.0.C	F_R.0.D	F_R.0.E	F_R.0.F	F_R.0.G	PL_R	F_R.0.H	SBZ
18	F_R.0.I	F_R.0.J	SM_R.7	F_R.0.K	F_R.0.L	F_R.0.M	SM_R.6	SBZ	F_R.1.A	F_R.1.B	F_R.1.C	F_R.1.D	F_R.1.E	F_R.1.F	F_R.1.G	SBZ
20	9600_R	F_R.1.H	F_R.1.I	F_R.1.J	SM_R.5	F_R.1.K	F_R.1.L	SBZ	F_R.1.M	SM_R.4	F_R.2.A	F_R.2.B	F_R.2.C	F_R.2.D	F_R.2.E	SBZ
22	F_R.2.F	F_R.2.G	DCS_R	F_R.2.H	F_R.2.I	F_R.2.J	SM_R.3	SBZ	F_R.2.K	F_R.2.L	F_R.2.M	U?	U?	U?	U?	SBZ
24	F_R.3.DP	A?	SM_R.2	F_R.3.A	F_R.3.B	F_R.3.C	F_R.3.D	SBZ	F_R.3.E	F_R.3.F	F_R.3.G	MUTE_R	F_R.3.H	F_R.3.I	F_R.3.J	SBZ
26	SM_R.1	F_R.3.K	F_R.3.L	F_R.3.M	SM_R.0	F_R.4.A	F_R.4.B	SBZ	F_R.4.C	F_R.4.D	F_R.4.E	F_R.4.F	F_R.4.G	MT_R	F_R.4.H	SBZ
28	F_R.4.I	F_R.4.J	BUSY_R	F_R.4.K	F_R.4.L	F_R.4.M	KEY2	SBZ	F_R.5.A	F_R.5.B	F_R.5.C	F_R.5.D	F_R.5.E	F_R.5.F	F_R.5.G	SBZ
30	SET	F_R.5.H	F_R.5.I	F_R.5.J	LOCK	F_R.5.K	F_R.5.L	SBZ	F_R.5.M	U?	U?	U?	U?	U?	U?	SBZ
32	MAIN_R	TX_R	PLUS_R	MINUS_R	ENC_R	DEC _R	PMS_R	SBZ	SKIP_R	C_R.0.C	C_R.0.B	C_R.0.G	C_R.0.A	C_R.0.E	C_R.0.F	SBZ
34	C_R.0.D	C_R.2.D	C_R.1.C	C_R.1.B	C_R.1.G	C_R.1.A	C_R.1.E	SBZ	C_R.1.F	C_R.1.D	C_R.DSH	C_R.2.C	C_R.2.B	C_R.2.G	C_R.2.A	SBZ
36	C_R.2.E	C_R.2.F	MAIN_L	TX_L	PLUS_L	MINUS_L	ENC_L	SBZ	DEC_L	PMS_L	SKIP_L	C_L.0.C	C_L.0.B	C_L.0.G	C_L.0.A	SBZ
38	C_L.0.E	C_L.0.F	C_L.0.D	A?	C_L.1.C	C_L.1.B	C_L.1.G	SBZ	C_L.1.A	C_L.1.E	C_L.1.F	A?	U?	U?	U?	SBZ
40	U?	U?	C_L.2.C	C_L.2.B	C_L.2.G	C_L.2.A	C_L.2.E	SBZ	C_L.2.F	C_L.2.D	U?	U?	U?	U?	U?	SBZ

Documentation

Operations Manual

FT-8800R tech documentation

From Interlock Rochester Wiki

Contents

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Technical

Pinouts

Protocol

Head unit packet

Main unit Packet

Missing Information

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